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The Most Lightweight Mutually Exclusive Synchronization Mechanism

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Implement the mutex primitive via MI instructions CHKLKVAL and CLRLKVAL.

 

Efforts of numerous computer scientists have been devoted to solving performance problems in different performance-critical circumstances. One of these performance problems is the expense in thread synchronization. Thread synchronization is the application of particular mechanisms to ensure that two concurrently executing threads do not execute specific portions of a program at the same time. By using MUTual EXclusion (mutex), access to shared resources from multiple threads can be serialized, and mutually exclusive program logic can be guaranteed to run in a single thread at any time. Thread synchronization is not limited to threads in the same process; it also applies to synchronization between different processes, or in other words, threads in different processes.

 

Mutex is the most frequently used thread synchronization primitive. Only one thread can lock (or own) a mutex at any given time. No other thread can own that mutex until the owning thread unlocks (or gives up) that mutex. Thus, access to shared resource or mutually exclusive program logics can be protected between a successful acquisition of a mutex and an unlock operation on the mutex.

 

i5/OS implements the mutex primitive via pointer-based mutexes at the MI level. In i5/OS, both POSIX thread (Pthread) mutexes and conditional variables are implemented using pointer-based mutexes. ILE high-level language (HLL) programs can use pointer-based mutexes either directly via mutex management MI instructions or through Pthread mutex synchronization APIs. As a frequently used thread synchronization mechanism, pointer-based mutexes are more lightweight than many other synchronization mechanisms, such as object locks or space location locks. Locking a pointer-based mutex uses about 50 RISC instructions, while acquiring a space location lock uses about 500 RISC instructions. But pointer-based mutexes are not lightweight enough where thread synchronization is heavily used. First, a pointer-based mutex uses about 1000 RISC instructions for creation or deletion. It's obviously a big performance overhead when pointer-based mutexes are to be created and then destroyed frequently. Second, when creating a pointer-based mutex, system resources are allocated for it; performance degradation of the whole system can occur as the number of created pointer-based mutexes increases. So is there a more lightweight mutually exclusive synchronization mechanism in i5/OS?

 

The answer lies in two MI instructions: Check Lock Value (CHKLKVAL) and Clear Lock Value (CLRLKVAL). Unlike pointer-based mutexes, these two MI instructions implement mutually exclusive synchronization basing on a shared 8-byte signed binary scalar, rather than a mutex object; therefore, they have no creation or deletion costs associated with them and will not lead to system resource overhead. Let's take a close look at these instructions and see how to use them to implement mutually exclusive synchronization.

Implementing the Mutex Primitive via MI Instructions CHKLKVAL and CLRLKVAL

The CHKLKVAL and CLRLKVAL instructions should be used in combination when implementing mutually exclusive synchronization between two or more threads. The following ILE RPG prototypes of the system built-ins of these instructions are extracted from mih54.rpgleinc of open-source project i5/OS Programmer's Toolkit:

 

     /**

      * CHKLKVAL, check lock value

      */

     d chklkval        pr            10i 0 extproc('_CHKLKVAL')

     d     lock                      20i 0

     d     old_val                   20i 0 value

     d     new_val                   20i 0 value

 

     /* CLRKLVAL, check lock value */

     d clrlkval        pr                  extproc('_CLRLKVAL')

     d     lock                      20i 0

     d     new_val                   20i 0 value

 

CHKLKVAL performs the following atomic (not interruptible) sequence of operations: the value of lock is compared to the value of old_val. If the two values are equal, the value of new_val is stored into lock and the numeric value 0 is returned. If the two values are not equal, the numeric value 1 is returned. CLRLKVAL stores the value of new_val to lock atomically. Note that the 8-byte signed binary scalar lock should be accessible to all threads to be synchronized.

 

Here's a basic example of implementing mutually exclusive synchronization via the CHKLKVAL and CLRLKVAL instructions:

 

      /free

           // Try to acquire the lock.

           dow chklkval(lock : 0 : 1) = 1;

               // Wait for a short time.

           enddo;

 

           // After acquiring the lock, access shared resources

           // or run mutually exclusive program logics.

 

           // Release the lock.

           clrlkval(lock : 0);

      /end-free

 

In this example, lock is a shared 8-byte signed binary scalar with initial value zero. To acquire the ownership of lock, each thread loops until invoking CHKLKVAL on lock returns zero. After a successful acquisition of lock, a thread becomes the owner of lock and is permitted to access shared resources or run mutually exclusive program logics protected by lock.

 

Since CHKLKVAL performs the comparison of lock to numeric value zero and the update operation of lock atomically, when multiple threads invoke CHKLKVAL concurrently, only one thread can see the state that lock is equal to zero, change lock's value to one, and then become the owner of lock. Once the ownership of lock is acquired by one thread, all other threads trying to acquire lock are kept outside the door. After doing its jobs, the owning thread gives up its ownership of lock by invoking CLRLKVAL to restore lock's value to zero atomically. This allows other threads to acquire lock. By now, a high-performance mutually exclusive synchronization mechanism has been implemented. For a complete code example, please refer to t105.rpgle.

Additional Considerations

Attention should be paid to several additional points.

 

First, the lock operand of CHKLKVAL and CLRLKVAL must be 8-byte aligned. Failure to have lock aligned properly will not be detected, but the results of the CHKLKVAL and CLRLKVAL instructions are undefined.

 

Second, where can the lock be stored? For synchronization between threads belonging to different i5/OS jobs, it can be stored in space objects or associated spaces of other i5/OS objects that can be accessed from jobs to be synchronized. For synchronization between threads within a job, it can be stored in any form of global program storage. For example, it can be a data object exported by a service program, or it can be allocated from static storage, activation group-based heap storage, or teraspace storage by the initial thread of the job and then passed to threads to synchronize.

 

Third, in the mutex implementation discussed here, the owner of a mutex should not hold the lock for the mutex too long—for example, while waiting to receive a message from a message queue or waiting for user input from the STDIN. At the time a mutex is being owned by one thread, there are probably other threads that are trying to acquire this mutex by invoking CHKLKVAL repeatedly, which obviously will waste processor time.

 

Last, as low-level synchronization instructions, CHKLKVAL and CLRLKVAL provide no options for deadlock detection or prevention, as would be available with pointer-based mutexes. To implement recursive locks using CHKLKVAL and CLRLKVAL, additional design and implementation efforts are needed. For example, the following two procedures implement a reentrant mutex that can be locked recursively only by its current owner.

 

     /* Acquire a mutually exclusive lock recursively. */

     d recursive_lock...

     d                 pr

     d     old_value                 20i 0

     d     new_value                 20i 0

     d     wait_tmpl                       likeds(wait_tmpl_t)

 

     /* Release a mutually exclusive lock recursively. */

     d recursive_unlock...

     d                 pr

     d     old_value                 20i 0

     d     new_value                 20i 0

     d     wait_tmpl                       likeds(wait_tmpl_t)

 

     /* ... ... */

 

     /* Implementation of procedure recursive_lock. */

     p recursive_lock  b

 

     d                 pi

     d     old_value                 20i 0

     d     new_value                 20i 0

     d     wait_tmpl                       likeds(wait_tmpl_t)

 

      /free

           // Acquire lock.

           dow chklkval(lock : old_value : new_value) = 1;

               waittime(wait_tmpl);

           enddo;

 

           // Increase old_value and new_value by 1.

           old_value += 1;

           new_value += 1;

      /end-free

     p recursive_lock  e

 

     /* Implementation of procedure recursive_unlock. */

     p recursive_unlock...

     p                 b

 

     d                 pi

     d     old_value                 20i 0

     d     new_value                 20i 0

     d     wait_tmpl                       likeds(wait_tmpl_t)

 

      /free

           // Decrease old_value and new_value by 1.

           old_value -= 1;

           new_value -= 1;

 

           // Release lock.

           clrlkval(lock : old_value);

      /end-free

     p recursive_unlock...

     p                 e

 

In the above reentrant mutex implementation, by incrementing the old_val and new_val operands of CHKLKVAL by 1 at each recursion, the owner of lock can successfully lock it twice, three times, four times, n times, and unlock it n times with CLRLKVAL. Data structure wait_tmpl_t is declared in mih52.rpgleinc as the instruction template of MI instruction WAITTIME. The complete example code is available at t106.rpgle.

Implementing Mutex

This article explains the most efficient way to implement the mutex primitive in i5/OS via the CHKLKVAL and CLRLKVAL instructions. As specifically designed MI instructions for implementing low-level locking protocols, CHKLKVAL and CLRLKVAL bring us extra gains in efficiency in thread synchronization, whereas extra design efforts have to be made when more complicated synchronization logic, such as recursive locks, are needed. So is there a compromise between performance and simplicity of design? If you'd like to find out, please let me know.

as/400, os/400, iseries, system i, i5/os, ibm i, power systems, 6.1, 7.1, V7, RPG

 

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